Zilog Z80 Pinout

Zilog Z80 Pinout

For reference purposes, here is the pinout for the Zilog Z80 CPU.


  • A0 to A15 = Address bus


  • D0 to D7 = Data bus


  • CLK = Clock signal

Red & Black

  • VCC = +5v
  • GND = Ground


  • RFSH = outputs a signal to allow for memory to be refreshed
  • M1 = Z80 is fetching next instruction from memory
  • RESET = used to reset the Z80
  • BUSRQ = Bus Request (used by external devices to request control
  • WAIT = makes the the Z80 wait during a read or write operation
  • BUSACK = Bus Acknowledge – signals when Z80 is ready to hand over control
  • WR = signals a memory or I/O write operation
  • RD = signals a memory or I/O read operation
  • INT = hardware interrupt occurred
  • NMI = Non Maskable Interrupt (higher priority than the INT)
  • HALT = Z80 is in a halted state
  • MREQ = Z80 wants to access memory
  • IORQ = Z80 wants to access an I/O port

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